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Aurora 64B/66B IP Core on Polarfire

Janvier 2024

We have ported our Aurora 64B/66B on Polarfire, and tested it on the Polarfire kit. This is described in details in the Reference Design Documentation available below. In principle, this type of document is confidential and accessible only after signing a mutual NDA. Please understand that you (…)

Aurora 8B/10B on Polarfire

Janvier 2024

Like we did for our Aurora 64B/66B, we have ported our Aurora 8B/10B on Polarfire, and tested it on the Polarfire kit. This is described in details in the Reference Design Documentation available below. In principle, this type of document is confidential and accessible only after signing a (…)

LiteX and Lattice FPGAs

Janvier 2024

LiteX : Enhancing FPGA development with versatility and integration Author : Florent Kermarrec http://www.enjoy-digital.fr/ Overview of LiteX LiteX is an FPGA framework recognized for its broad compatibility with a range of FPGA platforms, including Lattice, Intel, Xilinx and and new actors (…)

Igloo nano Kit tutorial

Janvier 2024

This is an old Tutorial for a vintage kit ! Surprisingly, you’ll see that the methodology shown here is still valid. This old tutorial show how to use the Igloo nano kit for implementing and testing a UART. It shows how things worked 15 years ago, and you might be surprised to see that things (…)

10G Ethernet on Polarfire

Janvier 2024

End 2023, we have ported several of our IPs on the Microchip Polarfire family, including our 10G Ethernet processor-less IP. In doing so, we have created a Reference Design for the MPF-300 EVAL Kit. The full documentation for this Reference Design is accessible below. - Microchip

ChipBridge (Chip-To-Chip)

Janvier 2024

This IP is ideal to control a lot of peripherals from a centralized high-end (Master) FPGA (or ASIC) ! Connecting and controlling peripherals from the Master directly is typically difficult and inefficient : lack of support for 3.3V I/Os, level translators and ESD protections required, (…)

IPs

Janvier 2024

All our IPs are available on Intel FPGAs. -* AVB MILAN Aurora 64B/66B Aurora 8B/10B Chip-Bridge (chip-to-chip link) 10GEDEK (10G Ethernet processor-less stack) GEDEK (1 Gigabit/100M Ethernet processor-less stack) Remote update (through Ethernet RS232, RS485, SPI …) JESD204B Tx+Rx NAND Flash (…)

High Speed LVDS communication

Mai 2023

Practically all FPGAs, even the low cost ones, offer the capability to create high-speed communication links based on LVDS signalling. If you think it’s complex to use this capability, this article will prove you wrong. LVDS (Low Voltage Differential Signalling) is a standard that uses two (…)

Remote Update for Lattice FPGAs

Avril 2023

ALSE’s IP for remote Update through Ethernet - Lattice

Intel Remote Update Application Note

Janvier 2023

We have updated and re-published this Application Note created in 2010. It explains the principles and implementation of multi-boot in Altera now Intel FPGAs. The actual features available in the Intel FPGAs to allow the use of multiple configuration images in the external memory are actually (…)